Mail Index

• Thread Index

• Re: [oc] Free tools CD
  • From: sbala@trinc.com
• [oc] TLB Design
  • From: Ali Mashtizadeh <ali@alikat.org>
• Re: [oc] lpm (altera)
  • From: Richard Herveille <richard@asics.ws>
• Re: [oc] Hardware
  • From: Victor the Cleaner <jonathan@canuck.com>
• Re: [oc] Hardware
  • From: Daniel Haensse <daniel.haensse@alumni.ethz.ch>
• Re: [oc] Idea: V.92 modem
  • From: John Dalton <john.dalton@bigfoot.com>
• RE: [oc] Hardware
  • From: "Manoj Viswambharan" <Manoj.Viswambharan@idt.com>
• Re: [oc] Open Source PCI Bridge Soft Core
  • From: "Damjan Lampret" <lampret@opencores.org>
• Re: [oc] Idea: V.92 modem
  • From: "Dennis Kaliher" <dkaliher@swbell.net>
• Re: [oc] lpm (altera)
  • From: "Damjan Lampret" <lampret@opencores.org>
• Re: [oc] Hardware
  • From: "David Feustel" <dfeustel@mindspring.com>
• Re: [oc] SHA-1
  • From: Dian Tresna Nugraha <diantn@yahoo.com>
• [oc] Draft of new FAQ available
  • From: John Dalton <john.dalton@bigfoot.com>
• Re: [oc] Idea: V.92 modem
  • From: Franck Perronnet <f.perronnet@ebv.com>
• Re: [oc] Idea: V.92 modem
  • From: Franck Perronnet <f.perronnet@ebv.com>
• Re: [oc] documentation for simple_i2c
  • From: Richard Herveille <richard@asics.ws>
• RE: [oc] Hardware
  • From: Shaun Seow <ysseow@neces.nec.com.sg>
• [oc] SHA-1
  • From: I Made Aria Bagus P <aria@students.ee.itb.ac.id>
• Re: AW: AW: [oc] Visual VHDL.
  • From: I Made Aria Bagus P <aria@students.ee.itb.ac.id>
• [oc] Re: Open Source PCI Bridge Soft Core (fwd)
  • From: Rudolf Usselmann <rudi@asics.ws>
• [oc] documentation for simple_i2c
  • From: "Ryan Henderson" <hendersr@oit.edu>
• Re: [oc] TFrom owner-cores@opencores.org Mon Feb 25 07:08:36 2002Re: [oc] Open Source PCI Bridge Soft Core (fwd)
  • From: =?GB2312?Q?=C0=D6=D4=B0=C4=F1?= <leyuanniao@263.net>John Dalton <john.dalton@bigfoot.com>
• Re: [oc] Fw: UART
  • From: "Ryan Henderson" <hendersr@oit.edu>
• [oc] Risc5x utility
  • From: Lloyd Wood <l.wood@eim.surrey.ac.uk>"MikeJ" <mikej@opencores.org>
• [oc] I2C EEPROM Model
  • From: kurian_oommen@hotmail.com
• Re: [oc] Fw: UART
  • From: Rudolf Usselmann <rudi@asics.ws>
• Re: [oc] Fw: UART
  • From: RAMU_TPGIT@rediffmail.com
• Re: [oc] OpenTech CDROM
  • From: freebsdfan@hotmail.com
• Re: [oc] Hardware
  • From: John Sheahan <jrsheahan@optushome.com.au>
• Re: [oc] How To get started ?
  • From: John Sheahan <jrsheahan@optushome.com.au>
• Re: [oc] Hardware
  • From: Matts Kivik <kivik@firstlinux.net>
• Re: [oc] Hardware
  • From: Shehryar Shaheen <shehryar.shaheen@ul.ie>
• RE: [oc] Hardware
  • From: Matts Kivik <kivik@firstlinux.net>
• [oc] How To get started ?
  • From: Matts Kivik <kivik@firstlinux.net>
• [oc] lpm (altera)
  • From: "Andrei Shevchenko" <andreishevchenko@hotmail.com>
• Re: [oc] SNR Calculation using CADENCE SpectreS tool
  • From: adesh_b@angelfire.com
• Re: [oc] re: query regarding Xilinx PAR
  • From: Madhusudhan Rao <madhu_sudhana_rao@yahoo.com>
• [oc] re: query regarding Xilinx PAR
  • From: "Stanford, David" <STANFDA@mail.northgrum.com>
• [oc] =?gb2312?B?UmU6UmU6IFtvY10gT3BlblRlY2ggQ0RST00=?=
  • From: "ganlu" <lu-gan@263.net>
• Re: [oc] Bluetooth Core
  • From: Jamil Khatib <jamilkhatib75@yahoo.com>
• Re: [oc] OpenTech CDROM
  • From: Jamil Khatib <jamilkhatib75@yahoo.com>
• [oc] TLB Design
  • From: "Ali Mashtizadeh" <ali@alikat.org>
• [oc] A Query Regarding Xilinx PAR
  • From: harshit.suri@st.com
• [oc] OCIDEC core revisions
  • From: Richard Herveille <richard@asics.ws>
• Re: [oc] Bluetooth Core
  • From: "Damjan Lampret" <lampret@opencores.org>
• [oc] Bluetooth Core
  • From: Shehryar Shaheen <shehryar.shaheen@ul.ie>
• [oc] Core updates
  • From: Richard Herveille <richard@asics.ws>
• Re: [oc] Query on cordic...
  • From: Richard Herveille <richard@asics.ws>
• [oc] Code_mac
  • From: roshni_rs@rediffmail.com
• Re: [oc] Problem with Risc5x core
  • From: "MikeJ" <mikej@opencores.org>
• [oc] Panchakshari G
  • From: "Marko Mlinar" <markom@opencores.org>
• [oc] MIPS/ARM Incompatible Instruction Set
  • From: "Ali Mashtizadeh" <ali@alikat.org>
• [oc] MIPS/ARM Incompatible Instruction Set
  • From: "Ali Mashtizadeh" <ali@alikat.org>
• [oc] Problem with Risc5x core
  • From: "MikeJ" <mikej@opencores.org>
• Re: [oc] Reply before Post?
  • From: "Damjan Lampret" <lampret@opencores.org>
• [oc] Reply before Post?
  • From: "Paul McFeeters" <paul.mcfeeters@ntlworld.com>
• [oc] Query on cordic...
  • From: sridhar nandula <nandulasridhar@yahoo.com>
• Re: [oc] legal advice
  • From: "Damjan Lampret" <lampret@opencores.org>
• Re: [oc] legal advice
  • From: Daniel Haensse <daniel.haensse@alumni.ethz.ch>
• Re: [oc] legal advice
  • From: big8pack@yahoo.com
• Re: [oc] legal advice
  • From: Graham Seaman <graham@seul.org>
• Re: [oc] legal advice
  • From: "Damjan Lampret" <lampret@opencores.org>
• Re: [oc] legal advice
  • From: Rudolf Usselmann <rudi@asics.ws>
• Re: [oc] legal advice
  • From: Jecel Assumpcao Jr <jecel@merlintec.com>
• Re: [oc] legal advice
  • From: Victor the Cleaner <jonathan@canuck.com>
• Re: [oc] legal advice
  • From: Jean Masson <Jean.Masson@lium.univ-lemans.fr>
• [oc] legal advice
  • From: "Damjan Lampret" <lampret@opencores.org>
• Re: [oc] Re:Re: [oc] OpenTech CDROM
  • From: "Damjan Lampret" <lampret@opencores.org>
• Re: [OT] Re: [oc] IDE
  • From: Agador Sparticus <mega_gojira@wowmail.com>
• Re: [oc] IDE
  • From: Chris Wedgwood <cw@f00f.org>
• [OT] Re: [oc] IDE
  • From: xavier ordoquy <xordoquy@aurora-linux.com>
• Re: [oc] IDE
  • From: Al Gilhousen <alg@mesira.com>
• [oc] IDE
  • From: "ram" <ram@rttsindia.com>
• Re: [oc] Risc5x update
  • From: "Damjan Lampret" <lampret@opencores.org>
• [oc] Risc5x update
  • From: "MikeJ" <mikej@opencores.org>
• Re: [oc] VGA core update
  • From: Agador Sparticus <mega_gojira@wowmail.com>
• RE: [oc] Altera.
  • From: "kw@nie" <kwanie@pacific.net.sg>
• Re: [oc] Altera.
  • From: harshit.suri@st.com
• Re: [oc] ALDEC Vs. ModelSIM (VHDL Simulator)
  • From: "Michael Ayton" <mike_ayton@dsl-only.com>
• Re: [oc] Prototype boards like the XSA-100
  • From: Agador Sparticus <mega_gojira@wowmail.com>
• Re: [oc] Prototype boards like the XSA-100
  • From: "Tony Burch" <tony@burched.com.au>
• Re: [oc] Free Software
  • From: Agador Sparticus <mega_gojira@wowmail.com>
• Re: [oc] Prototype boards like the XSA-100
  • From: "Ryan Henderson" <hendersr@oit.edu>
• Re: [oc] Prototype boards like the XSA-100
  • From: Agador Sparticus <mega_gojira@wowmail.com>
• Re: [oc] Prototype boards like the XSA-100
  • From: Rodolfo Jardim de Azevedo <rjazevedo@iname.com>
• [oc] Prototype boards like the XSA-100
  • From: "Paul McFeeters" <paul.mcfeeters@ntlworld.com>
• Re: [oc] Free Software
  • From: dietz@vse.sk
• RE: [oc] IDE/ATA-5 controller with DMA and Hard Disk support in Verilog?
  • From: Agador Sparticus <mega_gojira@wowmail.com>
• RE: [oc] ALDEC Vs. ModelSIM (VHDL Simulator)
  • From: "Paul McFeeters" <paul.mcfeeters@ntlworld.com>
• RE: [oc] IDE/ATA-5 controller with DMA and Hard Disk support in Verilog?
  • From: "Paul McFeeters" <paul.mcfeeters@ntlworld.com>
• Re: [oc] Altera.
  • From: Jeff Hanoch <jeff@lowrance.com>
• Re: [oc] ALDEC Vs. ModelSIM (VHDL Simulator)
  • From: "Frederic" <frederic@mail.ksut.edu.tw>
• [oc] IDE/ATA-5 controller with DMA and Hard Disk support in Verilog?
  • From: "Samit Ashdhir" <samit@antares.com>
• [oc] Verilog C++ Convertor
  • From: starz2far@juno.com
• Re: [oc] ALDEC Vs. ModelSIM (VHDL Simulator)
  • From: Billditt@aol.com
• Re: [oc] ALDEC Vs. ModelSIM (VHDL Simulator)
  • From: "Paul Baxter" <paul_baxter@ntlworld.com>
• Re: [oc] IDE in unix
  • From: Agador Sparticus <mega_gojira@wowmail.com>
• RE: [oc] IDE in unix
  • From: "Paul McFeeters" <paul.mcfeeters@ntlworld.com>
• RE: [oc] ALDEC Vs. ModelSIM (VHDL Simulator)
  • From: "Morris, Scott J" <morris.scott@pnl.gov>
• Re: [oc] IDE in unix
  • From: MICHAEL M DELANEY <mmdst23+@pitt.edu>
• Re: [oc] Problem with EDF format
  • From: Rudolf Usselmann <rudi@asics.ws>
• Re: [oc] IDE in unix
  • From: John Sheahan <jrsheahan@optushome.com.au>
• Re: [oc] ALDEC Vs. ModelSIM (VHDL Simulator)
  • From: ramkripalec@yahoo.co.uk
• [oc] Problem with EDF format
  • From: "R. Ramakrishna" <rayaprolu_rk@yahoo.com>
• Re: [oc] IDE in unix
  • From: "Damjan Lampret" <lampret@opencores.org>
• [oc] IDE in unix
  • From: "ram" <ram@rttsindia.com>
• Re: [oc] DPLL
  • From: vivekm@cadence.com
• [oc] ORCP-2 Prototype Board Still Alive?
  • From: gr3k@virginia.edu
• [oc] protocol
  • From: John Sheahan <jrsheahan@optushome.com.au>
• Re: [oc] Language
  • From: Billditt@aol.com
• Re: [oc] Language
  • From: Agador Sparticus <mega_gojira@wowmail.com>
• Re: [oc] Language
  • From: jacky.lue@philips.com
• [oc] VGA core update
  • From: Richard Herveille <richard@asics.ws>
• Re: [oc] CORDIC Processor
  • From: Richard Herveille <richard@asics.ws>
• Re: [oc] Language
  • From: Billditt@aol.com
• Re: [oc] Language
  • From: "Ryan Henderson" <hendersr@oit.edu>
• RE: [oc] Language
  • From: "Dautel, Rob" <Dautel@AllAmerican.com>
• Re: [oc] Language
  • From: Billditt@aol.com
• [oc] SIS doubts
  • From: Ganesh Venkataraman <gvenkata@engineering.uiowa.edu>
• Re: [oc] =?gb2312?B?UmU6UmU6IFtvY10gT3BlblRlY2ggQ0RST00=?=
  • From: Miha Lampret <mlampret@opencores.org>
• [oc] Language
  • From: Agador Sparticus <mega_gojira@wowmail.com>
• Re: [oc] SHA-1
  • From: Dian Tresna Nugraha <diantn@yahoo.com>
• Re: [oc] 8051 VHDL models search
  • From: sundar_ece@yahoo.com
• RE: [oc] mirror - Domain names
  • From: "Ali Mashtizadeh" <ali@alikat.org>
• Re: [oc] SHA-1
  • From: I Made Aria Bagus P <aria@students.ee.itb.ac.id>
• [oc] =?gb2312?B?UmU6UmU6IFtvY10gT3BlblRlY2ggQ0RST00=?=
  • From: "ganlu" <lu-gan@263.net>
• [oc] =?gb2312?B?UmU6UmU6IFtvY10gRFBMTA==?=
  • From: "ganlu" <lu-gan@263.net>
• Re: [oc] OpenTech CDROM
  • From: Miha Lampret <mlampret@opencores.org>
• [oc] CORDIC Processor
  • From: jmouro@iol.pt
• [oc] help
  • From: Kubecki Michal <qubeck@trex.wsi.edu.pl>
• [oc] Altera.
  • From: Juan José "Peco" San Martín <peco@microbotica.es>
• Re: [oc] I'm laughing so much its hurts,
  • From: "Martin.J Thompson" <Martin.J.Thompson@trw.com>
• Re: [oc] DPLL
  • From: alexhu@alltek.com.cn
• [oc] OpenTech CDROM
  • From: "Erik M. Sirikhum" <s2010159@kmitl.ac.th>
• Re: [oc] I'm laughing so much its hurts,
  • From: kkranen@synopsys.com
• Re: [oc] Re: MP3 decode core.
  • From: jokeshe@21CN.COM
• Re: [oc] Can I get the "SDRAM controller VHDL" or Verilog Source Code?
  • From: "=?gb2312?B?sNe35g==?=" <baifeng@mprc.pku.edu.cn>
• Re: [oc] MP3 Encoder?
  • From: kris121@rediffmail.com
• Re: [oc] Can I get the "SDRAM controller VHDL" or Verilog Source Code?
  • From: "I. Servan Uzun" <isu@btae.mam.gov.tr>
• Re: [oc] Can I get the "SDRAM controller VHDL" or Verilog Source Code?
  • From: Madhusudhan Rao <madhu_sudhana_rao@yahoo.com>
• Re: [oc] Can I get the "SDRAM controller VHDL" or Verilog Source Code?
  • From: "I. Servan Uzun" <isu@btae.mam.gov.tr>
• [oc] vga-lcd core update
  • From: Richard Herveille <richard@asics.ws>