Mail Index

• Thread Index

• [oc] press,
  • From: "Nina Ercell"<yu5543s@sprintpcs.com>
• Re: [oc] Hi..take you a little time.
  • From: tinaako@yahoo.com
• RE: [oc] CAN core in VHDL
  • From: "Igor Mohor\(opencores\)" <igorm@opencores.org>
• Re: [oc] CAN core in VHDL
  • From: "Emmanuel Touloupis" <E.Touloupis@lboro.ac.uk>
• Re: [oc] FPGA BOARD Considerations
  • From: Héctor Orón Martínez <hecormar@teleco.upv.es>
• Re: [oc] FPGA BOARD Considerations
  • From: Armando Astarloa <jtpascua@bi.ehu.es>
• Re: [oc] Any projects in VHDL with source code ?
  • From: Soban Shoeb Chawre <sobanc@nital.stpp.soft.net>
• [oc] Any projects in VHDL with source code ?
  • From: sreekanth_murali@programmer.net
• Re: [oc] FPGA BOARD Considerations
  • From: "robinluo" <robinluo@cytecht.com>
• Re: [oc] FPGA BOARD Considerations
  • From: John Sheahan <jrsheahan@optushome.com.au>
• Re: [oc] very very urgent
  • From: Billditt@aol.com
• [oc] FPGA BOARD Considerations
  • From: Héctor Orón Martínez <hecormar@teleco.upv.es>
• Re: [oc] very very urgent
  • From: Rudolf Usselmann <rudi@asics.ws>
• Re: How to increase SNR? (was Re: [oc] very very urgent)
  • From: "Damjan Lampret" <lampret@opencores.org>
• Re: [oc] very very urgent
  • From: Shehryar Shaheen <shehryar.shaheen@ul.ie>
• Re: How to increase SNR? (was Re: [oc] very very urgent)
  • From: Rudolf Usselmann <rudi@asics.ws>
• Re: [oc] very very urgent
  • From: John Dalton <john.dalton@bigfoot.com>
• Re: How to increase SNR? (was Re: [oc] very very urgent)
  • From: Marko Mlinar <markom@opencores.org>
• Re: [oc] very very urgent
  • From: Niclas Hedhman <niclas@hedhman.org>
• How to increase SNR? (was Re: [oc] very very urgent)
  • From: John Dalton <john.dalton@bigfoot.com>
• Re: [oc] very very urgent
  • From: Shehryar Shaheen <shehryar.shaheen@ul.ie>
• Re: [oc] very very urgent
  • From: Shehryar Shaheen <shehryar.shaheen@ul.ie>
• Re: [oc] very very urgent
  • From: Holger Baxmann <hbaxmann@mac.com>
• Re: [oc] very very urgent
  • From: Rudolf Usselmann <rudi@asics.ws>
• Re: [oc] very very urgent
  • From: Soban Shoeb Chawre <sobanc@nital.stpp.soft.net>
• Re: [oc] very very urgent
  • From: Rudolf Usselmann <rudi@asics.ws>
• [oc] no_idea
  • From: "albert raj a" <allbut@lycos.com>
• RE: [oc] very very urgent
  • From: manxi wang <wangmanxi@yahoo.com>
• RE: [oc] very very urgent
  • From: "renaux jacky" <renaux.jacky@wanadoo.fr>
• Re: [oc] very very urgent
  • From: Holger Baxmann <hbaxmann@mac.com>
• Re: [oc] very very urgent
  • From: Joachim Strömbergson<Joachim.Strombergson@InformAsic.com>
• [oc] very very urgent
  • From: "sundararajan ramamurthy" <sundar_r_murthy@rediffmail.com>
• Re: [oc] CAN core in VHDL
  • From: Soban Shoeb Chawre <sobanc@nital.stpp.soft.net>
• Re: [oc] How about a C-FLEA core?
  • From: ghulam.abbas@lokpunjab.org
• [oc] CAN core in VHDL
  • From: Shehryar Shaheen <shehryar.shaheen@ul.ie>
• [oc] IMA ADPCM codec
  • From: liagi@hotmail.com
• [oc] Synthesis help
  • From: "henry_xb" <xxiaobin@263.net>
• [oc] vga/lcd core
  • From: Richard Herveille <richard@asics.ws>
• [oc] H.263 core
  • From: Richard Herveille <richard@asics.ws>
• Re: [oc] =?utf-8?q?=E7=AD=94=E5=A4=8D=3A=20=5Boc=5D=20Re=3A=20=5Boc=5D=20=E7=AD=94=E5=A4=8D=3A?==?utf-8?q?=20=5Boc=5D=20Suggesting=20H263codec?= core
  • From: Richard Herveille <richard@asics.ws>
• Re: [oc] =?x-user-defined?Q?=B4=F0=B8=B4?=: [oc] Re: [oc] =?x-user-defined?Q?=B4=F0=B8=B4?=: [oc] Suggesting H263codeccore
  • From: Soban Shoeb Chawre <sobanc@nital.stpp.soft.net>
• [oc] =?gb2312?B?IFJlOiBbb2NdILTwuLQ6IFtvY10gU3VnZ2VzdGluZyBIMjYzY29kZWMgY28=?==?gb2312?B?cmU=?=
  • From: "Yan Qu" <yanqu@sbcglobal.net>
• =?GB2312?Q?Re: Re: [oc] =B4=F0=B8=B4: [oc] Re: [oc] =B4=F0=B8=B4: [oc] Suggesting H263codec?==?GB2312?Q? core?=
  • From: "henry_xb" <xxiaobin@263.net>
• Re: [oc] =?gb2312?B?tPC4tDogW29jXSBSZTogW29jXSC08Li0OiBbb2NdIFN1Z2dlc3Rpbmc=?= H263codec core
  • From: AMemar@email.com
• Re: [oc] Free FPGA ?
  • From: Andras Tantos <andras_tantos@tantos.homelinux.org>
• Re: Re: [oc] I2C core in slave mode
  • From: "tanveer tan" <tanveer008@rediffmail.com>
• [oc] SCHEMATIC DREIVEN LAYOUT
  • From: Tanveer Shariff <shariff_ics@yahoo.com>
• [oc] Crypto cores
  • From: jccs3000@yahoo.co.uk
• Re: [oc] I2C core in slave mode
  • From: manxi wang <wangmanxi@yahoo.com>
• Re: [oc] I2C core in slave mode
  • From: Richard Herveille <richard@asics.ws>
• Re: [oc] I2C core in slave mode
  • From: "R. Ramakrishna" <rayaprolu_rk@yahoo.com>
• Re: [oc] Free FPGA ?
  • From: Loi Tran <leotran@att.net>
• [oc] Multi-Network-Protocol Gateway
  • From: Shehryar Shaheen <shehryar.shaheen@ul.ie>
• Re: [oc] More Spartan-III info
  • From: Laura Warman <lwarman@telusplanet.net>
• Re: [oc] I2C core in slave mode
  • From: sdb@cloud9.net (Stuart Brorson)
• Re: [oc] ç­å¤: [oc] a newbie question
  • From: manxi wang <wangmanxi@yahoo.com>
• [oc] Free FPGA ?
  • From: Soban Shoeb Chawre <sobanc@nital.stpp.soft.net>
• Re: [oc] I2C core in slave mode
  • From: Soban Shoeb Chawre <sobanc@nital.stpp.soft.net>
• Re: [oc] a newbie question
  • From: John Sheahan <jrsheahan@optushome.com.au>
• [oc] [Fwd: Re: [admin] LXT441 Deprecated by Intel(LevelOne)]
  • From: Jams <wireless@tampabay.rr.com>
• RE: [oc] I2C core in slave mode
  • From: "Jerrold Wen" <jwen@visualsonics.com>
• RE: [oc] : [oc] a newbie question
  • From: "Ho, Wen Jei x4297" <who1@rockwellcollins.com>
• Re: [oc] I2C core in slave mode
  • From: Richard Herveille <richard@asics.ws>
• [oc] =?utf-8?B?562U5aSNOiBbb2NdIGEgbmV3YmllIHF1ZXN0aW9u?=
  • From: "Zhichong Chen (Beijing)" <ZhichongChen@viatech.com.cn>
• Re: [oc] I2C core in slave mode
  • From: sdb@cloud9.net (Stuart Brorson)
• Re: [oc] a newbie question
  • From: Lars Segerlund <lars.segerlund@comsys.se>
• [oc] a newbie question
  • From: Ken Lim <ken_s_lim@yahoo.com>
• [oc] I2C core in slave mode
  • From: airizar@ceit.es
• [oc] Realize PCMCIA in FPGA
  • From: "robinluo" <robinluo@cytecht.com>
• Re: Odp: [oc] More Spartan-III info
  • From: wramsdel@attbi.com
• RE: [oc] Micro FPGA board
  • From: "Chris - ReDeTronics bvba" <online103219@online.be>
• Re: [oc] More Spartan-III info
  • From: John Sheahan <jrsheahan@optushome.com.au>
• Re: [oc] Asynchronous design
  • From: "zhaoyongqi" <zhao_yongqi@sina.com>
• Re: [oc] Micro FPGA board
  • From: Soban Shoeb Chawre <sobanc@nital.stpp.soft.net>
• RE: [oc] Micro FPGA board
  • From: "Chris - ReDeTronics bvba" <online103219@online.be>
• [oc] Asynchronous design
  • From: "=?gb2312?B?x/G3vA==?=" <q_f82@sina.com>
• Odp: [oc] More Spartan-III info
  • From: "Jerzy G" <furia1024@wp.pl>
• Odp: [oc] More Spartan-III info
  • From: "Jerzy G" <furia1024@wp.pl>
• Re: [oc] MP3 Encoder?
  • From: jxtang@163.com
• Re: [oc] Micro FPGA board
  • From: Soban Shoeb Chawre <sobanc@nital.stpp.soft.net>
• [oc] More Spartan-III info
  • From: wramsdel@attbi.com
• Re: [oc] Micro FPGA board
  • From: manxi wang <wangmanxi@yahoo.com>
• RE: [oc] Micro FPGA board
  • From: "Chris - ReDeTronics bvba" <online103219@online.be>
• Re: [oc] Micro FPGA board
  • From: "Damjan Lampret" <lampret@opencores.org>
• Re: [oc] Micro FPGA board
  • From: Lars Segerlund <lars.segerlund@comsys.se>
• [oc] Micro FPGA board
  • From: Soban Shoeb Chawre <sobanc@nital.stpp.soft.net>
• [oc] Xilinx Spartan III released in April
  • From: antti@case2000.com
• Re: [oc] help!!
  • From: nico <nicolas.boulay@ifrance.com>
• Re: [oc] FW: what is IP Engine core
  • From: wazwaz_david@yahoo.com
• Re: [oc] Join OpenCore
  • From: Héctor Orón Martínez <hecormar@teleco.upv.es>
• Re: [oc] Design Question
  • From: Niclas Hedhman <niclas@internuscorp.com>
• Re: [oc] Media Chip for 8bit/CRTC
  • From: Damien Légiéda <damien_legieda@hotmail.com>
• [oc] Join OpenCore
  • From: =?big5?q?Chou=20Harris?= <harris_chou@yahoo.com>
• Re: [oc] Media Chip for 8bit/CRTC
  • From: Niclas Hedhman <niclas@internuscorp.com>
• Re: [oc] Analog design
  • From: "Edward Wang" <ewang@ArcadiaDesign.com>
• RE: [oc] PCI core - I can't synthesize.
  • From: "Igor Mohor\(opencores\)" <igorm@opencores.org>
• [oc] Media Chip for 8bit/CRTC
  • From: Damien Légiéda <damien_legieda@hotmail.com>
• RE: [oc] PCI core - I can't synthesize.
  • From: sharad_k@hotmail.com
• Re: [oc] FPGA with free tools?
  • From: Colin Marquardt <c.marquardt@alcatel.de>
• Re: [oc] FPGA with free tools?
  • From: Holger Baxmann <holger@bitwind.org>
• RE: [oc] Analog design
  • From: "Y.Naruse" <sysworks@saitama-j.or.jp>
• Re: [oc] FPGA with free tools?
  • From: antti@case2000.com
• [oc] Analog design
  • From: "Edward Wang" <ewang@ArcadiaDesign.com>
• [oc] usart
  • From: pratheeshks2003@yahoo.co.in
• RE: [oc] Verilog Books
  • From: sphuynh <sphuynh@micron.com>
• Re: [oc] FPGA with free tools?
  • From: Andreas Bogk <andreas@andreas.org>
• Re: [oc] Need some Help..
  • From: Armando Astarloa <jtpascua@bi.ehu.es>
• Re: [oc] Verilog Books
  • From: Joachim Strömbergson<Joachim.Strombergson@InformAsic.com>
• RE: [oc] Verilog Books
  • From: "Ho, Wen Jei x4297" <who1@rockwellcollins.com>
• Re: [oc] FPGA with free tools?
  • From: Colin Marquardt <c.marquardt@alcatel.de>
• [oc] FPGA with free tools?
  • From: Andreas Bogk <andreas@andreas.org>
• RE: [oc] Verilog Books
  • From: "Y.Naruse" <sysworks@saitama-j.or.jp>
• Re: [oc] Verilog Books
  • From: bkurtz@engineer.com
• Re: [oc] Verilog Books
  • From: manxi wang <wangmanxi@yahoo.com>
• Re: [oc] Verilog Books
  • From: Andras Ferencz <opencores@ferencz.org>
• Re: [oc] FFT algorithm
  • From: manxi wang <wangmanxi@yahoo.com>
• Re: [oc] Verilog Books
  • From: manxi wang <wangmanxi@yahoo.com>
• [oc] AX8 core verified on XC2S200
  • From: antti@case2000.com
• [oc] How can a gradulate student learn more from IPCORES
  • From: manxi wang <wangmanxi@yahoo.com>
• Re: [oc] Need a VHDL live project
  • From: manxi wang <wangmanxi@yahoo.com>
• [oc] Verilog Books
  • From: bkurtz@nexql.com
• Re: [oc] help!!
  • From: Shawn Tan <shawn.tan@aeste.net>