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Re: [oc] FFT algorithm
Dear sir ,
Would you like show me the link of the Low Power FFT
ASIC Implementation , thank you very much!
manxi wang
--- jiayuetang@hotmail.com wrote: > hi,
> A Stanford Ph.D dissertation on low power FFT ASIC
> implementation can
> download. and there is serveral thesis in Maryland
> ISL lab website.
> The architecture depends on your implementation
> aim, such as low
> area or low power consumption.
>
> Good luck~~~~
>
> jiayue
>
> ----- Original Message -----
> From: rbatra5@r...
> To: cores@o...
> Date: Sun, 9 Feb 2003 07:36:56 -0100
> Subject: [oc] FFT algorithm
>
> >
> >
> > Hello Sir,
> >
> > I am looking for IEEE papers for FFT
> Implementation in VLSI.
> > basically an architecture and state diagrams.. for
> the Controller .
> >
> > I am using 1 multiplier and two adders for it,
> the idea got from
> > IEEE
> > papers on net.
> >
> > but i don;t have much information to start
> with....
> >
> > so ...i request u to guide me to good site.for
> FFT where i can
> > information or suggest me some good projects to
> work on...if i can
> > get
> > good material or specification on that on net...
> >
> > I am currently a VLSI student..
> >
> >
>
> > Thanking u,
> >
>
> > Rajan Batra.
> >
> --
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