Re: [oc] Configuration Bit Stream Generators

[Marko Mlinar <marko.mlinar@flextronicssemi.com>]

Dave Feustel wrote:
> 
> Mark,
> 
> Can you provide any details on your upcoming FPGA?
> 
> In particular, will it have any ADC or DAC i/o?
It depends on the implementation. Since HDLs will be free,
there is no problem to add them.
Just to make my points clear:
I said that bitstream generator is available on the net;
but currently no HDL developer yet volountered to write HDL
for a FPGA architecture, proposed on the web site. It is not
a lot of work, but someone has to do it, since I adon't know
any HDL.

Yes, I suppose it is going to be tested on Altera or Xilinx FPGA ;)

Marko
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