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[cvs-checkins] ethernet/rtl/verilog eth_top.v

To: cvs-checkins@opencores.org
Subject: [cvs-checkins] ethernet/rtl/verilog eth_top.v
From: OpenCores CVS Agent <cvs@www.lampret.com>
Date: Fri, 20 Sep 2002 16:13:00 -0100
Sender: owner-cvs-checkins@opencores.org

CVSROOT:	/home/oc/cvs
Module name:	ethernet
Changes by:	mohor	02/09/20 16:13:00

Modified files:
	rtl/verilog    : eth_top.v 

Log message:
	CsMiss added. When address between 0x800 and 0xfff is accessed within
	Ethernet Core, error acknowledge is generated.

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