[cvs-checkins] mem_ctrl/rtl/verilog mc_adr_sel.v mc_cs_rf.v m ...

[OpenCores CVS Agent <cvs-checkins-agent@opencores.org>]

CVSROOT:	/home/oc/cvs
Module name:	mem_ctrl
Changes by:	rudi	01/11/29 03:16:33

Modified files:
	rtl/verilog    : mc_adr_sel.v mc_cs_rf.v mc_defines.v mc_dp.v 
	                 mc_mem_if.v mc_obct.v mc_rd_fifo.v mc_rf.v 
	                 mc_timing.v mc_top.v mc_wb_if.v 

Log message:
	- More Synthesis cleanup, mostly for speed
	- Several bug fixes
	- Changed code to avoid auto-precharge and
	burst-terminate combinations (apparently illegal ?)
	Now we will do a manual precharge ...

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