[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

[cvs-checkins] uart16550/rtl/verilog uart_receiver.v uart_regs.v

To: cvs-checkins@opencores.org
Subject: [cvs-checkins] uart16550/rtl/verilog uart_receiver.v uart_regs.v
From: OpenCores CVS Agent <cvs-checkins-agent@opencores.org>
Date: Wed, 28 Nov 2001 20:36:43 +0100
Sender: owner-cvs-checkins@opencores.org

CVSROOT:	/home/oc/cvs
Module name:	uart16550
Changes by:	gorban	01/11/28 20:36:43

Modified files:
	rtl/verilog    : uart_receiver.v uart_regs.v 

Log message:
	Fixed: timeout and break didn't pay attention to current data format when counting time

--
To unsubscribe from cvs-checkins mailing list please visit http://www.opencores.org/mailinglists.shtml

Prev by Date: [cvs-checkins] or1k/or1ksim/peripheral mc.h
Next by Date: [cvs-checkins] mem_ctrl/rtl/verilog mc_adr_sel.v mc_cs_rf.v m ...
Prev by thread: [cvs-checkins] uart16550/rtl/verilog uart_receiver.v uart_regs.v
Next by thread: [cvs-checkins] i2c/rtl/verilog i2c_master_top.v
Index(es):
- Date
- Thread