CVSROOT: /home/oc/cvs Module name: or1k Changes by: lampret 01/11/18 10:58:32 Modified files: mp3/rtl/verilog/or1200: cpu.v except.v ifetch.v Log message: Fixed some l.trap typos. -- To unsubscribe from cvs-checkins mailing list please visit http://www.opencores.org/mailinglists.shtml