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[cvs-checkins] wb_prefetch_spram/rtl/verilog generic_spram.v

To: cvs-checkins@opencores.org
Subject: [cvs-checkins] wb_prefetch_spram/rtl/verilog generic_spram.v
From: OpenCores CVS Agent <cvs-checkins-agent@opencores.org>
Date: Thu, 18 Oct 2001 19:41:54 +0200
Sender: owner-cvs-checkins@opencores.org

CVSROOT:	/home/oc/cvs
Module name:	wb_prefetch_spram
Changes by:	lampret	01/10/18 19:41:54

Modified files:
	rtl/verilog    : generic_spram.v 

Log message:
	Fixed data outputs when writing into SRAM.

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