Re: [oc] Lookin for a MISC core

["Dirk Heise" <dheise@debitel.net>]

----------
> Von: Jecel Assumpcao Jr <jecel@merlintec.com>
> An: cores@opencores.org
> Betreff: Re: [oc] Lookin for a MISC core
> Datum: Dienstag, 10. Juli 2001 00:48
[...]
> I used Dr. Ting's P16 (http://www.ultratechnology.com/p16vhdl.htm) as a 
> test VHDL source to compare free software from Xilinx and Altera. The 
> results were better than I had expected (faster than 50 MHz before any 
> optimization) and though they required larger chips than I wanted to 
> use it is probably easy to make it much smaller by changing the design 
> to make use of the RAMs in the FPGAs.
> 
> -- Jecel

Thanks a lot!
In fact, i have application-specific FPGA designs in mind, that is,
try to compile the app into the CPU design, so i guess i will also be 
able to strip size down. And more than 50 MHz for an FPGA implementation
sounds really good!

Dirk Heise
dheiseNOdebitelSPAMnet

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