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Re: Re: [pci] about configuration space of pci core
hi, all
there is an error in pci_blue_options.vh, definition of PCI_BASE_ADDR0_MATCH_RANGE should be
`define PCI_BASE_ADDR0_MATCH_RANGE 31:24
instead of
`define PCI_BASE_ADDR0_MATCH_RANGE 31:20
which is corrected in new version of pci_blue_options.vh($Id: pci_blue_options.vh,v 1.4 2001/03/05 09:54:52 bbeaver Exp $)
the error result in a pci config read error which is in task Read_Test_Device_Config_Regs(pci_behaviorial_target.v):
case (reg_number[7:2])
6'h00: Read_Config_Reg = 32'h8000AAAA
| {13'h0000, test_device_id[2:0], 16'h0000};
6'h01: Read_Config_Reg = {Target_Status[15:0], Target_Command[15:0]};
6'h02: Read_Config_Reg = 32'hFF000000;
6'h03: Read_Config_Reg = {16'h0000, Latency_Timer[7:0], Cache_Line_Size[7:0]};
6'h04: Read_Config_Reg = {BAR0[`PCI_BASE_ADDR0_MATCH_RANGE],
`PCI_BASE_ADDR0_FILL, `PCI_BASE_ADDR0_MAP_QUAL}; // error
`ifdef PCI_BASE_ADDR1_MATCH_ENABLE
6'h05: Read_Config_Reg = {BAR1[`PCI_BASE_ADDR1_MATCH_RANGE],
`PCI_BASE_ADDR1_FILL, `PCI_BASE_ADDR1_MAP_QUAL}; // error
`else // PCI_BASE_ADDR1_MATCH_ENABLE
6'h05: Read_Config_Reg = 32'h00000000;
`endif // PCI_BASE_ADDR1_MATCH_ENABLE
6'h0F: Read_Config_Reg = {16'h0000, 8'h01, Interrupt_Line[7:0]};
default: Read_Config_Reg = 32'h00000000;
endcase
the right value is 36 bit long and the left is 32 bit long, so the highest 4 bit will be discarded.
sumnow
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