[cvs-checkins] pci/rtl/verilog pci_tpram.v wb_tpram.v

[OpenCores CVS Agent <cvs-checkins-agent@opencores.org>]

CVSROOT:	/home/oc/cvs
Module name:	pci
Changes by:	mihad	02/08/19 15:51:37

Modified files:
	rtl/verilog    : pci_tpram.v wb_tpram.v 

Log message:
	Extracted distributed RAM module from wb/pci_tpram.v to its own file, got rid of undef directives
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