[cvs-checkins] or1k/orp/orp_soc/rtl/verilog/or1200 or1200_cpu ...

[OpenCores CVS Agent <cvs-checkins-agent@opencores.org>]

CVSROOT:	/home/oc/cvs
Module name:	or1k
Changes by:	lampret	02/07/14 21:17:20

Modified files:
	orp/orp_soc/rtl/verilog/or1200: or1200_cpu.v or1200_defines.v 
	                                or1200_du.v or1200_except.v 
	                                or1200_freeze.v or1200_top.v 
	                                or1200_wb_biu.v 
	                                or1200_xcv_ram32x8d.v 

Log message:
	Added simple trace buffer [only for Xilinx Virtex target]. Fixed instruction fetch abort when new exception is recognized.
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