CVSROOT: /home/oc/cvs Module name: or1k Changes by: lampret 02/01/23 08:51:01 Modified files: mp3/rtl/verilog/mem_if: flash_top.v sram_top.v Log message: Added wb_err_o to flash and sram i/f for testing the buserr exception. -- To unsubscribe from cvs-checkins mailing list please visit http://www.opencores.org/mailinglists.shtml