CVSROOT: /home/oc/cvs Module name: or1k Changes by: lampret 01/11/23 09:38:58 Modified files: mp3/rtl/verilog/or1200: cpu.v defines.v du.v except.v or1200.v sprs.v Log message: Changed DSR/DRR behavior and exception detection. -- To unsubscribe from cvs-checkins mailing list please visit http://www.opencores.org/mailinglists.shtml