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[cvs-checkins] irda/ ench/verilog/irda_test.v tl/verilog/irda ...
CVSROOT: /home/oc/cvs
Module name: irda
Changes by: gorban 01/09/01 22:22:21
Modified files:
bench/verilog : irda_test.v
rtl/verilog : irda_crc32.v irda_fir_4ppm_decoder.v
irda_fir_4ppm_encoder.v irda_fir_bit_sync.v
irda_fir_flag_det.v irda_fir_flag_gen.v
irda_fir_rx.v irda_fir_tx.v
irda_master_register.v irda_mir_decoder.v
irda_mir_rx.v irda_out_mux.v irda_sir_decoder.v
irda_top.v
sim/rtl_sim/bin: sim.tcl
Log message:
major bug fixes. some code rewrite.
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