[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: [oc] verilog to vhdl converter
Either way is fine with me.
regards,
Damjan
----- Original Message -----
From: "Rudolf Usselmann" <rudi@asics.ws>
To: <cores@opencores.org>
Sent: Monday, April 07, 2003 3:30 AM
Subject: Re: [oc] verilog to vhdl converter
> On Mon, 2003-04-07 at 15:40, John Dalton wrote:
> > Maybe such projects should be put under the stewardship of gEDA?
> > (http://www.geda.seul.org)
> >
> > John
>
> Thats actually even a better idea.
>
> Damjan, I would say lets hold off with the "Tools"
> section. May be you should forward all future project
> requests that are tools to the gEDA site ? May be
> OpenCores should remain strictly IP cores ? What do
> you think ?
>
> Regards,
> rudi
> ------------------------------------------------
> www.asics.ws - Solutions for your ASIC needs -
> FREE IP Cores --> http://www.asics.ws/ <---
> ----- ALL SPAM forwarded to: UCE@FTC.GOV -----
>
>
>
>
> --
> To unsubscribe from cores mailing list please visit
http://www.opencores.org/mailinglists.shtml
>
--
To unsubscribe from cores mailing list please visit http://www.opencores.org/mailinglists.shtml