Re: [oc] VERA

[m_p_desai@yahoo.com]

Hi

VERA is HVL, Its syntax is close to CPP language with some differences. 
Most of Verification environment can be developed using VERA, Which 
includes BUS Interface Standards, Network Standards and also CPU Core 
verification. 
The Advance feature of VERA supports 
* Object Oriented Concepts support
* Various Control Statements like if…else , while , do etc. 
* Concurrent programming concepts using fork...join, suspend thread, 
terminate thread and some advance option.
* Random and directed test case generation.
* Easy to Change interface details for integration with HDL.
* Support interface with various simulators.

I had worked on Two Projects, Where I had used VERA as Verification 
Component and found that it is good programming language to perform 
regress testing and get good coverage.


You can visit http://www.open-vera.com/ for more details on VERA HVL.
If you need any specific information , You can send me a mail. 


Manish Desai





----- Original Message ----- 
From: vlsi_champ@i...  
To: cores@o...  
Date: Wed, 28 Aug 2002 06:23:31 -0100 
Subject: [oc] VERA 

> 
> 
> Hello All, 
> 
> Can any body tell me the application and significance of Vera? I 
> know 
> that it is mainly used for developing the testbenches, but don’t 
> know 
> about its features; can anybody please elaborate on the features of 
> Vera? 
> 
> Thanks in advance, 
> 
> Regards, 
> 
> Vlsi_Champ.... 
> 
--
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