Re: [oc] wishlist/todolist

[Jamil Khatib <khatib@ieee.org>]

Hi,
I am currently in contact with the designer of this logic Analyzer
 http://allanwright.home.mindspring.com/

I think it can be used in future online FPGA simulation tools

Regards,
Jamil

Damjan Lampret wrote:

> ----- Original Message -----
> From: <jdalton@opencores.org>
> To: <cores@opencores.org>
> Sent: Wednesday, January 02, 2002 1:46 AM
> Subject: Re: [oc] wishlist/todolist
>
> >
> > 1) Would it be possible to set up the wishlist as a wiki?
> > This would allow others to develop the original author's
> > idea further.  It would also allow the author to update
> > the web page as their idea develops in their own mind.
>
> What is a wiki?
>
> You mean that an entry can be edited (once it is already in wishlist)?
> This would certainly be nice, I'll discuss it with Miha.
>
> >
> > 2) Taking it one step further, would it be possible for
> > opencores to provide a full blown collaborative
> > design environment?  I know this is ambitious,
> > and will not happen overnight, but it could be
> > a direction to head in.  It also requires the developer
> > to have a full time connection to the net, to be trully useful.
> >
> > Imagine... Someone posts an entry in the wishlist.
> > Another fleshes out the idea.  Someone else decides
> > to write a snippet of code.  Eventually the 'project'
> > produces something useful, even though no single person
> > made a conscious effort to run a 'project'.
>
> Do you have concrete ideas what resources to develop to link ideas and
> projects?
>
> What I have in mind is a backend environment with EDA tools where opencores
> web serves as a frontend. For start I think we could start with a web based
> HDL editor and a HDL simulator. Basically it would look something like this:
> 1) login to opencores
> 2) start a project
> 3) write some HDL
> 4) run simulation and log off
> 5) come back later (let say 2 hours later) and analyze simulation results
>
> Of course for running simulations current dual PIII won't be enough. We'll
> probably need a small cluster farm. ;-)
>
> Eventually we might even end up with a synthesis and an array of FPGA
> boards. My initial idea was to use FPGA boards for debugging but I think
> that might not work well in practice. One thing I see synthesis software and
> FPGAs good for:
> 1) you get some feedback about size and speed of your core
> 2) you can verify that simulation and implementation work the same (probably
> there are better ways to check this)
> 3) most important - you can run some 100x more test cases than in simulation
> (does anyone know better use for an FPGA array than this ?!)
> I'd put an FPGA array online mostly because of point 3.
>
> I also envision we will have a linter that will work directly with the CVS.
> When somebody will commit HDL code to the CVS, it will automatically be
> analyzed by a linter and report will be emailed to the developer.
> In similar manner I see simulation environment as a way how to run regular
> regression test of cores in the CVS. Imagine that all designated cores get
> checked out from the CVS every time a commit is made to the CVS and a
> regression test is being run. This would increase integrity of the cores a
> lot.
> You can see something like this in case of openrisc gnu toolchain -
> http://www.opencores.org/cores/or1k-new/ats/. Right now OR1K ATS only tests
> OR1K gnu toolchain.
>
> BTW I think simulation environment and also linter could be very real ideas
> and implemented rather soon.
>
> >
> > 3) At what point does something stop being a 'wish'
> > and become a 'project'.  Perhaps it is worth putting
> > some thought into a migration path from 'wish'
> > to 'project' and the grey area between?
>
> Definitely. So any concrete ideas?
>
> >
> > By the way, is there a bug in the mail archive software?
> > The core archive for January 2002 already has 261 messages listed.
>
> Probably. Miha?
>
> regards,
> Damjan
>
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--
   Jamil Khatib
OpenCores Organization
http://www.opencores.org


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