[oc] VHDL in SYNOPSYS

[rmmy@ee.iitb.ac.in]

Dear all,
   I am beginer for vhdl using SYNOPSYS.  Can you please give me the steps for simulating a VHDL code in SYNOPSYS(VHDL System Simulator). I know how to synthesize.

Thank you, 

regards,
rmmy.
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