Re: [openrisc] Re: binutils, gcc and Linux on the OpenRISC [repost]

[Lee Begg <llnz@paradise.net.nz>]

On Wednesday 27 March 2002 05:53, you wrote:
> On Mon, Mar 25, 2002 at 09:05:00AM +0100, Marko Mlinar wrote:
> > OpenRISC Reference Platform (ORP)
> >
> > Address Space
> >
> > 0xf000_0000 - 0xffff_ffff  Cached	256MB	ROM
> > 0xc000_0000 - 0xefff_ffff  Cached	768MB	Reserved
> > 0xb800_0000 - 0xbfff_ffff  Uncached	128MB	Reserved for custom devices
> > 0xa600_0000 - 0xb7ff_ffff  Uncached	288MB	Reserved
> > 0xa500_0000 - 0xa5ff_ffff  Uncached	16MB	Debug 0-15
> > 0xa400_0000 - 0xa4ff_ffff  Uncached	16MB	Digital Camera Controller 0-15
> > 0xa300_0000 - 0xa3ff_ffff  Uncached	16MB	I2C Controller 0-15
> > 0xa200_0000 - 0xa2ff_ffff  Uncached	16MB	TDM Controller 0-15
>
> [...]
>
> Is that how OR platforms would generally be built?  IMHO it's a bad idea
> to hardcode the address of every conceivable piece of hardware.

It also recreates some interesting limits, such as only 16 onboard (onchip?) 
ethernet controllers, 16 IDE controllers, 16 graphics controllers, etc. (and 
of course you want all of those, a 16 port ethernet swtich with 32 disk 
drives (RAID 5) running a 4x4 video wall just wont be enough  ;-)

>
> The OS/firmware can discover PCI addresses since it has to set them
> itself.  Since Wishbone devices are usually wired to fixed addresses
> this doesn't directly apply.
>
> A device table should be specified which includes device function,
> device ID, address and interrupt line (for function and ID we'd need a
> central device registry at OpenCores).  That table should be stored at
> the beginning of the ROM so that the startup code can load it relative
> to itself.
>
> That way the hardware can be wired any way that is useful and, since the
> table is separate and independent of the software, you wouldn't have to
> inject external files (with device config) into the build process of
> your software (e.g. the Linux kernel).

Yeah, that does help a lot.  Also the memory size should be in there too.

I just noticed there is no bios or flash memory on the ORP.

>
> Implementing that in Linux should also be easy since you just define a
> new bus and set it up with the device table (all buses in Linux have a
> PCI-like interface now, independent of that actual bus type).

I'll have to remeber that one  ;-)

Later
Lee "lots-of-little-systems-create-huge-ones" Begg
(llnz@opencores.org)
--
To unsubscribe from openrisc mailing list please visit http://www.opencores.org/mailinglists.shtml