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Re: [openrisc] Encryption

To: openrisc@opencores.org
Subject: Re: [openrisc] Encryption
From: test1@yahoo.com
Date: Sun, 13 Jan 2002 23:07:31 +0100
Reply-To: openrisc@opencores.org
Sender: owner-openrisc@opencores.org

Hi
The new MOTOROLA G5 and INTEL McKinley (IA-64) will have encryption / decryption circuit. Is it possible to add such circuit to OR?

There is a new OS with strong encryption. Several part of OS codes, data and applications are encrypted. After certain part is no longer needed, the part is flushed from memory. 

I have an idea about using such OS with a special version of OR with encryption circuit +  Partitioned CPU cache.  The first part of cache stored encrypted instruction code + data, the second part contain the real instruction code + data (already decrypted). The second part cann't be accessed directly from the chipset / motherboard. Is this idea possible?

Thank you.
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