Re: [oc] newbie to wishone

[aspoous@yahoo.com]

Thanks Richard,

I am trying to understand what you did, but I never used verilog before.

Could you tell me what the cab signal on the wishbone interface is used 
for?

To come back on the previous mail: am I very wrong then when 
assuming that on the falling edge of the clock the data and response 
signals from the slave are available?

regards,
Aspoous

----- Original Message ----- 
From: Richard Herveille <richard@a... > 
To: cores@o...  
Date: Mon, 24 Jun 2002 03:43:33 +0700 
Subject: Re: [oc] newbie to wishone 

> 
> I attached what I've done so far to this email. 
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