[oc] PUSH/POP Instructions on RISC?

[Ali Mashtizadeh <ali@alikat.org>]

Why are the push/pop instructions never found on risc processors? If a
processor has two write backs to the register file it doesn't need that
much more hardware to do post/pre-increment/decrement memory reference
instructions. Is there a special reason for not having these
instructions? It's simpler than a scaled memory reference reg+c*reg.

Ali
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