Re: [oc] Yet another z80 compatible

[Richard Herveille <richard@asics.ws>]

> how to design a counter that can count the number from 0 up to 79?

Create a 7-bit up counter. Use the output to reset it when the counter 
reaches 79 (or 78 if you make it a synchronous reset).

> and I wonder how to design a register that has 2^59 bits input and 32 bits
> output which works like as follows. In everytime rising edge clock, every
> 32 bits of the input will be proceeded to the output terminal beginning
> from the rightmost 32 bits of the input bits.

So what you actually want is a  5.764*10^17 deep shiftregister (ARE YOU 
SURE)??? This is a 536870912 GigaBit preloadable FIFO !!!!!

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