Re: [oc] Fwd: [cdrom] Re: FFT Hardware Structure Design

[John Dalton <johnd@southern-poro.com>]

Hi all,

Many years ago, Australia's major government research organisation
CSIRO produced an FFT chip.  It used the DeSpain algorithm.  I believe
the original chip was a bit serial implementation, but it is also
possible to build
a 'word serial' or fully parallel implementation.  A group at Macquarie
University
built a word serial implementation of the DeSpain algorithm around 6
years ago.

The DeSpain algorithm is a decomposition of an '2n' point FFT into two
'n' point FFTs connected by a multiplier.  With this algorithm, an
arbirtary
sized FFT can be built with 2 point FFT ('butterfly' operation) stages
separated by multipliers.  For implementation in silicon the DeSpain
algorithm
has the following advantages:
- It has a recursive structure.
- Most multipliers degenerate to simple phase rotators.  Comparitively
few
  complex multipliers are required.

For more info, see the following URL:

http://www.elec.mq.edu.au/networks/fft/fft_abs.html

I was the person who wrote the VHDL for the second generation of this
chip (which never got built).  The 3rd generation currently forms the
guts of a
very fast OFDM (orthogonal frequency division multipled) wireless LAN.
At the time, a 16 point complex FFT, with 8 bit components, was built
using
around 400 logic blocks in a xilinx 4025 FPGA.

Regards
John Dalton


Jamil Khatib wrote:

> I am forwarding this email to main opencores mailing
> list
>
> --- hanzy <hanzy@center.shao.ac.cn> wrote:
> > Date: Tue, 8 Aug 2000 11:14:11 +0800
> > From: hanzy <hanzy@center.shao.ac.cn>
> > To: "cdrom@opencores.org" <cdrom@opencores.org>
> > Subject: [cdrom] Re: FFT Hardware Structure Design
> > Reply-to: cdrom@opencores.org
> >
> > FFT Hardware Structure Design
> > I'm now researching in the Fastest FFT hardware
> > structure Design, (Fast Fourium Transform, 1024
> > complex points with 16 bits precision, should be
> > processed in 32us), I use VHDL to design the
> > structure, but to the structure I don't know the
> > details, the algorithm is easy, but to turn the
> > algorithm to structure and turn to digital
> > electronical design, for I have no experiences, I
> > still feel all adrift, is there any experts who can
> > give me some references?
> >
> > Best Regards!
> >
> >             hanzy
> >
> >
>
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