Re: [oc] compactflash/PCCARD-Interface

["Henchinski" <kaliski@bezeqint.net>]

Hi all
 this is a general description of the FPGA CompactFlash interface,
The host is Intel PXA processors (Bulverde) and accessed the CF via FPGA.

I believe that the number of wait state for CompactFlash memory/io modes are
set
   in the CPU, if desired we can add a Ready logic to hold the CPU as
needed.
   and that IOW,WE,OE and IOR are generated from the CPU OE, WE  and A
   ( need to verify )

The FPGA have 2 GPIO
- Control  for CF_EN, CF_RST
- Status for CF_VS1, CF_VS2, CF_BVD1, CF_BVD2, CF_NFAULT, CF_NIRQ, CF_CD

-------------------------- 
-- Compact Flash Interface
-------------------------- 
D <=  CF_D when CF2_DIR= '1' else "ZZZZZZZZZZZZZZZZ";
CF_D <=  D when CF2_OE= '1' else "ZZZZZZZZZZZZZZZZ";
CF_A <= A (10 downto 0) when CF_EN = '1' else "ZZZZZZZZZZZ";

-- CF CONTROL BUS
CF_OE <= (IOW or WE);
CF_DIR <= (OE or IOR);

If you guys think we should start a new project on Opencores that will
include
HW and Driver,  please mail me your requirements.





----- Original Message ----- 
From: "Vic" <vikrantps@yahoo.com>
To: <cores@opencores.org>
Sent: Saturday, August 02, 2003 9:50 PM
Subject: Re: [oc] compactflash/PCCARD-Interface


> Please do so. I am working in vhdl. Hence also
> interested in learning more about interfacing Compact
> Flash card with FPGAs.
>
> thanks,
> Vic.
> --- Henchinski <kaliski@bezeqint.net> wrote:
> > In my previous project, we mapped the CompactFlash
> > Card on the CPU (
> > StrongArm ) Memeory address
> > we used an FPGA to do some basic translation, no
> > memeory was needed, just
> > the some control signals
> > were generated and it works
> >
> > If  you would like the code I will attach it
> >
> > Y
> >
> >
> > ----- Original Message ----- 
> > From: <scyx@directbox.com>
> > To: <cores@opencores.org>
> > Sent: Friday, August 01, 2003 9:05 PM
> > Subject: [oc] compactflash/PCCARD-Interface
> >
> >
> > > I'm looking for an interface for producing a
> > PCCARD or CompactFlash-
> > > Card. Many vhdl-implemention for Host-Interfaces I
> > found. But nothing
> > > for the cardside-Interface.
> > > Maybe the best solution is a cardinterface which
> > included some memory
> > > (appr. 2048 bit) and my hardware has access to
> > this memory.
> > > Host (reading/writing) -> PCCARD ->Memory(on card)
> > <- my vhdl-code
> > > (reading/writing)
> > > Anybody has some ideas?
> > > thanx
> > > --
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> >
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