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Re: [usb] The question about USB2.0 IP core

Hi! Everyone!
  Where can I get the USB 2.0 Core? Is it free?
 
Best Regards,
Lfang
----- Original Message -----
From: KOYO
Sent: Tuesday, October 08, 2002 12:36 PM
Subject: [usb] The question about USB2.0 IP core

Hi!!Everybody
I have the question about USB2.0 IP core.
 
If OUT packet is smaller than MAX_PL_SZ in DMA operation, buffer size is sizu_c and buffer address is buf0_adr. I don't understand this operation.
  
   The original verilog code is following:
 
always @(posedge clk)
 idin[31:17] <= #1 out_to_small_r ? {4'h0,sizu_c} : {buffer_done,new_size};
 
always @(posedge clk)
 idin[SSRAM_HADR + 2:4] <= #1 out_to_small_r ? buf0_adr[SSRAM_HADR + 2:4] : new_adr[SSRAM_HADR + 2:4];
 
always @(posedge clk)
 if(buf_set_d)   idin[3:0] <= #1 new_adr[3:0];
 else
 if(out_to_small_r)  idin[3:0] <= #1 buf0_adr[3:0];
 else    idin[3:0] <= #1 {next_dpid, next_bsel};
 
Best Regards
 
koyo