Re: [usb] join

[Rudolf Usselmann <rudi@asics.ws>]

On Friday 22 February 2002 05:50 am, you wrote:
> hi,
>
> how can VHDL implementation be considered,
> since FPGA are inoperable at such high frequencies (480 MHz).
>
> thanks,
>
> Ben

Nobody said anything about FPGAs !

You are right, a USB 2.0 PHY would be an ASIC implementation
only. Still a nice project to do. Could be tested in a FPGA at Low
and Full speed modes.

rudi


> ----- Original Message -----
> From: Rudolf Usselmann <rudi@a... >
> To: <usb@o... >
> Date: Thu, 19 Apr 2001 12:48:15 +0700
> Subject: Re: [usb] join
>
> > on 4/19/01 8:29, Srujan Reddy at usbmail@y...  wrote:
> > > hi
> > > Where can i find VHDL code for USB 2.0 Transceiver
> > > Macrocell Interface(UTMI) for the specifications given
> > > in the site.
> > > please tell me if know where i can find it.
> > > thanks & regards
> > > Shahid
> >
> > How about writing one and making it available to everyone ?
> >
> > Cheers !
> > --
> > rudi


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