Re: [usb] host controller transceiver?

[Jecel Assumpcao Jr <jecel@merlintec.com>]

On Sunday 30 December 2001 04:28, Amey Hegde wrote:
> There is no problem in implementing it on FPGA.

Ok.

> Are u going in for a 8bit(60MHz) or a 16 bit (30MHz) interface for
> the EHCI ? If u r planning a 8 bit interface then please check if the
> timings are meeting early in the development phase..

Since I will use a Virtex II, I don't think a 60 MHz interface will be 
much of a problem. But saving a few pins could be important.

Steven Grunza had a very interesting idea - if you add a USB 2.0 hub 
chip to the motherboard then the FPGA would only need a high speed 
interface to talk to its upstream port and any of the transceivers I 
looked at would do just fine.

But in that case it might be more cost effective for me to use 
something like the Philips ISP1561 PCI Host Controller+Hub and replace 
the USB 2.0 core in the FPGA with a PCI one. Not as much fun, but if I 
replace two other i/o chips with PCI versions I might end up saving 
pins (and CLBs in the FPGA).

-- Jecel
--
To unsubscribe from usb mailing list please visit http://www.opencores.org/mailinglists.shtml