RE: [pci] RE: Implementation

["Gvozden Marinkovic" <gvozden@saga.co.yu>]

Thanks,

It is working! Maybe you can add some documentation on using different
tools for synthesis and simulation.

Gvozden

-----Original Message-----
From: owner-pci@opencores.org [mailto:owner-pci@opencores.org] On Behalf
Of Miha Dolenc
Sent: Tuesday, June 04, 2002 10:32 AM
To: pci@opencores.org
Subject: Re: [pci] RE: Implementation


Hi!

Try using

define_global_attribute          syn_netlist_hierarchy {0}

in Synplify constraint file.
We got rid of many messages of this kind using that attribute.

Regards,
Miha Dolenc

----- Original Message -----
From: "Gvozden Marinkovic" <gvozden@saga.co.yu>
To: <pci@opencores.org>
Sent: Tuesday, June 04, 2002 12:58 AM
Subject: [pci] RE: Implementation


>
> I am using Synplify for synthesis. When I try to implement design I am

> getting warnings like this:
>
> WARNING:NgdBuild:452 - logical net 
> 'bridge/pci_resets_and_interrupts/GND' has no driver 
> WARNING:NgdBuild:454 - logical net 
> 'bridge/pci_resets_and_interrupts/GND' has no load
>
> Does anyone know why GND and VCC signals are not connected?
>
> Gvozden
>
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>


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