[pci] Re: PCI Verification

["Ovidiu Lupas" <olupas@opencores.org>]

Hi Guys,

Sorry for my absence, but in the last week I am coming home after
midnight...
We have a delivery, and I was not able to catch in my testbench that my
SDRAM
memory DMA controller receives only 17 bits of address out of 27 ... ;)

I start hating this company ...

Oliver, I am not porting to Verilog the PCIsim, or, at least, not rigth now.
If you want to, I will be glad to help you as much as I can. But, IMO, the
PCI master
should be done in a total different way - the current version is an
improvement of one
of my friends and I do not like it. ;) The Target is mine, and I do like it
!!! ;)))

I just bougth a new PC, so I am plannig to install the Linux stuff on it
(including Alliance,
ModelSim and some other stuff).

About progress, unfortunately in the last time I did not advanced too much
...

Best regards,
   Ovidiu

----- Original Message -----
From: Oliver Amft <oam@oamx.net>
To: <olupas@opencores.org>; <pci@opencores.org>; <mihad@opencores.org>
Sent: Tuesday, June 05, 2001 9:58 AM
Subject: PCI Verification


> Hi Guys
> sorry for this delay and thanks for your offers!
> I think I'll stay with the verification, starting on PCI side.
> Miha, have you (or Tadej) specified the language of this project
> {Verilog, VHDL}? And what is the tool chain you re using?
> Ovidiu, are you porting the PCISim to Verilog?
>
> Cheers,
> Oliver
>