[fpu] Add/sub test

[Jamil Khatib <jamilkhatib75@yahoo.com>]

Hi all,

I need to design the test bench/ or C code to test the
adder circuit.

These are my suggested Tests to be run on the add/sub
unit
I)The same exponent
	1. Addition on operands having the same sign
	2. Addition on operands having different signs
		follow these tests
		1. Operand1 is -ve and op2 is +ve and the result is
+ve
		2. Operand1 is +ve and op2 is -ve and the result is
+ve
		3. Operand1 is -ve and op2 is +ve and the result is
-ve
		4. Operand1 is +ve and op2 is -ve and the result is
-ve
	3. Different set of numbers should be applied
II) Different exponents
	1. Do the same tests as above (all tests in I)
	2. let Op1 has the larger exponent
	3. let Op2 has the larger exponent
III) Denormalized numbers
	1. Op1 should be denormalized and op2 is normalized
	2. Op2 should be denormalized and op1 is normalized
	3. Both op1 and op2 should be denormalized
	4. calculations as in I and II should be made but the
result should be denormalized
IV) Special numbers
	1. NAN should be one of the operands.
	2. both operands should be NAN
	3. +-Inf should be one of the operands
	4. Both operands should be + inf or - inf
	5. Operands should be NAN and Inf
	6. op1 should be +inf and op2 should be -inf
	7. op2 should be +inf and op1 should be -inf
V) Do the same above tests (in I & II) on the
subtraction operation.
VI) Do the same tests in I,II,III and let the result
be very large to overflow or very small to underflow


Did I miss something?

Regards
Jamil Khatib


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