Re: [openrisc] WISC, Custom S.O.C.?

["Damjan Lampret" <damjan.lampret@flextronicssemi.com>]

----- Original Message -----
From: <Test1@yahoo.com>
To: <openrisc@opencores.org>
Sent: Friday, June 07, 2002 4:29 PM
Subject: [openrisc] WISC, Custom S.O.C.?


> Hi
> I read about "Writable Instruction Set Computer" / WISC from Imsys that
> can emulate various CPU such as Z-80, Java etc. Is it possible to write
> Open Risc emulator using this CPU?
>
> http://www.imsys.se/technology/techno.htm

If you can do a 32-bit RISC, then the answer is probably yes. I don't know
WISC, so I can't say for sure.

>
> There are several configurable "S.O.C." companies that offer intergration
> service with different type of CPU architecture, such as Palmchip
> DP-1800. Is it possible to use OpenRisc IP core with DP-1800?
>
> http://www.palmchip.com/products.html

No reason why not. Flextronics already did just that.

regards,
Damjan


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