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[openrisc] or1ksim testbenches fail
Hello All,
I am trying to run the or1ksim testbenches and cannot get past the cache
test. I am wondering if I am doing something wrong or if there is
something wrong in the testbench.
I am doing the "make check" from within the or1ksim/testbench
directory. Here's the output:
[jeff@asic1 testbench]$ make check
Making check in support
make[1]: Entering directory `/asic/proj/or1k/or1ksim/testbench/support'
make[1]: Nothing to be done for `check'.
make[1]: Leaving directory `/asic/proj/or1k/or1ksim/testbench/support'
Making check in uos
make[1]: Entering directory `/asic/proj/or1k/or1ksim/testbench/uos'
make[1]: Nothing to be done for `check'.
make[1]: Leaving directory `/asic/proj/or1k/or1ksim/testbench/uos'
make[1]: Entering directory `/asic/proj/or1k/or1ksim/testbench'
make check-TESTS
make[2]: Entering directory `/asic/proj/or1k/or1ksim/testbench'
Testing ./exit... OK
PASS: exit
Testing ./cbasic... OK
PASS: cbasic
Testing ./local_global... OK
PASS: local_global
Testing ./mul... OK
PASS: mul
Testing ./mycompress... OK
PASS: mycompress
Testing ./dhry... OK
PASS: dhry
Testing ./functest... OK
PASS: functest
Testing ./mem_test... OK
PASS: mem_test
Testing ./basic... OK
PASS: basic
Testing ./cache... (using ./cache.cfg) (sim) hist
00000204: : d4014818 l.sw 0x18(r1),r9
00000200: : 9c21ff8c l.addi r1,r1,-116
00000204: : d4014818 l.sw 0x18(r1),r9
00000200: : 9c21ff8c l.addi r1,r1,-116
.
.
.
Notice that it seemed to hang in the cache test, so I pressed Ctrl-C
then typed hist on the simulator command line. The execution history
shows this endless loop of l.sw and l.addi instructions.
I executed the next instruction, and got the following result:
(sim) t
EXCEPTION: write out of memory (32-bit access to 3c3c8320)
Exception 0x200 (Bus Error) at 0x204, EA: 0x3c3c8320, ppc: 0x204, npc:
0x208
00000204: : d4014818 l.sw 0x18(r1),r9 (executed) [time 1088896ps,
#1088894]
00000208: : 04000309 l.jal 0x309 (next insn)
GPR00: 00000000 GPR01: 3c3c8308 GPR02: 00000000 GPR03: 00000f24
GPR04: 40000000 GPR05: 00001638 GPR06: 9c21fffc GPR07: 00000000
GPR08: 00000000 GPR09: 00000000 GPR10: 00000000 GPR11: 00000000
GPR12: 00000000 GPR13: 00000000 GPR14: 00000000 GPR15: 00000000
GPR16: 00000000 GPR17: 00000000 GPR18: 00000000 GPR19: 00000000
GPR20: 00000000 GPR21: 00000000 GPR22: 00000000 GPR23: 00000000
GPR24: 00000000 GPR25: 00000000 GPR26: 00000000 GPR27: 00000000
GPR28: 00000000 GPR29: 00000000 GPR30: 00000000 GPR31: 00000000
flag: 0
It seems that a write is taking place to an address outside the boundary
of the memory device. I look at the cache.cfg file and it shows a
single RAM located at 0x00000000 with a size of 0x200000.
Obviously 0x3c3c8320 is outside this memory's range. The question I
have is this: Is this address my fault or a problem with the cache
test?
Any help would be appreciated.
Regards,
Jeff
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