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Re: [openrisc] binutils, gcc and Linux on the OpenRISC [repost]
Hi Lee!
> I had a few hours free, so I tried compiling binutils and gcc of
or32-linux
> (which is actually or32-unknown-linux-gnu).
>
> I had a few problems with binutils, but after changing the various
> configuration files (most changing or32-*-*linux to or32-*-*linux* or
> or32-*-*linux-gnu*) I managed to get all of binutils compiled.
Yes, the trend is to use linux-gnu; we've always using shorter version
or32-linux, like others do :)
> Q1: should I get an account to commit these (small) changes?
Yes, it would be nice if you could update the CVS frequently, but please
keep the old targets also.
For Linux you should import new module or1k/linux or or1k/linux-version
> After they where sucessfully installed, I tryed to compile gcc. I didn't
> have much luck.
>
> For target=or32-linux I get:
<cut>
> If I try with target=or32-elf I get:
<cut>
Both target should be very similar, I am not sure why there are differencies
in
outputs; I suspect you have problems with gcc/binutils configuration.
--prefix=<dir> option with binutils/gcc configure should be the same and
before
building gcc you should export <dir>/bin. The reason for this is that
<target>-gcc uses
<target>-as, or if not found just 'as', which is in your case wrong
assembler.
If the problem still remains compile with -v (verbose) and -save-temps
options,
and submit more detailed problem report again.
Look at script for building GNU utils on web site, so that you don't miss
any steps.
> Q2: Do I need to port gcc to or32-*-linux-gnu ?
>
> I guess I am going to need all these to start porting Linux to the
OpenRISC.
Yes, I think you are lucky in this case. uClinux and Linux are so similar,
that
I don't expect any problems here.
You may run into problem with binutils however - relocations/linking/dinamic
linking has not been tested.
> Q3: Are there any documents about the whole system, processor, bus,
memory,
> everything?
Good question. I am attaching Damjan's proposal of OpenRisc Reference
Platform.
Unfortunately it is not final yet, but it may be a good start.
If you are not going to mess with HW, you just need to set the .cfg file for
or1ksim.
> Q4: Are there any documents about the boot process?
Could you define what you mean by boot process?
or1k itself starts at 0x100; there is not much to tell; you will need to
init memory controller and uart in case you will use them. You can look at
boot
code at uClinux (I think it is arch/or32/kernel/head.S).
It also copies itself from flash into RAM, but this can be done much simpler
for a start, and if you are planning to run it only on or1ksim it is faster
and simpler
to debug.
Is this ok, or do you need HW loading instructions also?
> Q5: Anything else I should know before I start porting a week today?
:) I cannot remember anything, but feel free to ask anything when you
bump into a problem.
Maybe just a hint: be sure to use full debugging capabilities of or1ksim.
e.g. l.nop instructions can be quite handy -- look in
or1k/or1ksim/testbench/support.c
you can connect gdb to or1ksim, however I would suggest to use executed log
instead (look into or1k/or1ksim/sim.cfg how to enable it). Together with a
good searcher/editor
it is very powerful.
> Q6: Is there a documents describing how to use the simulator?
>
> I have been reading the documents and they are really useful. There are a
> few little errors and one or two omission which I will send an email about
> later.
unfortunately there is no real documentation on or1ksim; there is some help
with command lines and commands. The or1k/or1ksim/sim.cfg is nicely
documented.
Source code is trying to be documented and maybe it is the best
documentation
for deep questions/how things work.
Otherwise I don't think you really need the documentation, you will probably
spend the
most time figuring out how or1k works :)
> I look forward to starting shortly.
And we look forward to working with you,
Marko
OpenRISC Reference Platform (ORP)
Address Space
0xf000_0000 - 0xffff_ffff Cached 256MB ROM
0xc000_0000 - 0xefff_ffff Cached 768MB Reserved
0xb800_0000 - 0xbfff_ffff Uncached 128MB Reserved for custom devices
0xa600_0000 - 0xb7ff_ffff Uncached 288MB Reserved
0xa500_0000 - 0xa5ff_ffff Uncached 16MB Debug 0-15
0xa400_0000 - 0xa4ff_ffff Uncached 16MB Digital Camera Controller 0-15
0xa300_0000 - 0xa3ff_ffff Uncached 16MB I2C Controller 0-15
0xa200_0000 - 0xa2ff_ffff Uncached 16MB TDM Controller 0-15
0xa100_0000 - 0xa1ff_ffff Uncached 16MB HDLC Controller 0-15
0xa000_0000 - 0xa0ff_ffff Uncached 16MB Real-Time Clock 0-15
0x9f00_0000 - 0x9fff_ffff Uncached 16MB Firewire Controller 0-15
0x9e00_0000 - 0x9eff_ffff Uncached 16MB IDE Controller 0-15
0x9d00_0000 - 0x9dff_ffff Uncached 16MB Audio Controller 0-15
0x9c00_0000 - 0x9cff_ffff Uncached 16MB USB Host Controller 0-15
0x9b00_0000 - 0x9bff_ffff Uncached 16MB USB Func Controller 0-15
0x9a00_0000 - 0x9aff_ffff Uncached 16MB General-Purpose DMA 0-15
0x9900_0000 - 0x99ff_ffff Uncached 16MB PCI Controller 0-15
0x9800_0000 - 0x98ff_ffff Uncached 16MB IrDA Controller 0-15
0x9700_0000 - 0x97ff_ffff Uncached 16MB Graphics Controller 0-15
0x9600_0000 - 0x96ff_ffff Uncached 16MB PWM/Timer/Counter Controller 0-15
0x9500_0000 - 0x95ff_ffff Uncached 16MB Traffic COP 0-15
0x9400_0000 - 0x94ff_ffff Uncached 16MB PS/2 Controller 0-15
0x9300_0000 - 0x93ff_ffff Uncached 16MB Memory Controller 0-15
0x9200_0000 - 0x92ff_ffff Uncached 16MB Ethernet Controller 0-15
0x9100_0000 - 0x91ff_ffff Uncached 16MB General-Purpose I/O 0-15
0x9000_0000 - 0x90ff_ffff Uncached 16MB UART16550 Controller 0-15
0x8000_0000 - 0x8fff_ffff Uncached 256MB PCI I/O
0x4000_0000 - 0x7fff_ffff Uncached 1GB Reserved
0x0000_0000 - 0x3fff_ffff Cached 1GB RAM
Interrupts
0 Reserved
1 Reserved
2 UART16550 Controller 0
3 General-Purpose I/O 0
4 Ethernet Controller 0
5 PS/2 Controller 0
6 Traffic COP 0, Real-Time Clock 0
7 PWM/Timer/Counter Controller 0
8 Graphics Controller 0
9 IrDA Controller 0
10 PCI Controller 0
11 General-Purpose DMA 0
12 USB Func Controller 0
13 USB Host Controller 0
14 Audio Controller 0
15 IDE Controller 0
16 Firewire Controller 0
17 HDLC Controller 0
18 TDM Controller 0
19 I2C Controller 0, Digital Camera Controller 0