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Re: [openrisc] Trap exception revisited...



In trap case, K identifies SR bit and if it is set, causes a trap exception.

This way you can check carry, overflow bits and also implement range
checking together with sfXX instructions (by checking condition flag).

> >         l.trap  K
> >
> >                 if SR[K]==1 then breakpoint-exception(K)

Should read something like (K != X)):
                if SR[K]==1 then trap-exception(X)

regards,
Damjan

----- Original Message -----
From: "Marko Mlinar" <markom@opencores.org>
To: <openrisc@opencores.org>
Sent: Thursday, June 21, 2001 8:28 AM
Subject: Re: [openrisc] Trap exception revisited...


> > Question about trap exceptions. I'm confused about what
> > they actually are. Is this a real exception, or is it
> > simply an instruction? The l.trap definition says:
> >
> >         l.trap  K
> >
> >                 if SR[K]==1 then breakpoint-exception(K)
> >
> > This would seem to indicate that trap isn't a real
> > exception, and that the TE description should be
> > removed from the documentation.
> >
> > Gdb indicates a breakpoint like this:
> >
> >         l.trap  0
> >
> > But if this is correct, then what gdb is saying is that
> > a breakpoint can only be executed in supervisor mode???
> > (i.e. SR[0] = SR[SUPV]) That doesn't seem right to me.
> > Most debugging will be done in user mode...
> >
> > Also, the documentation in the 32/64 bit implementation
> > section says a breakpoint exception will be thrown, but
> > in the description it says trap exception.
> >
> > Are a breakpoint exception and a trap exception the same
> > thing?
> >
> > Can someone describe to me the logic behind the trap
> > instruction, and why we are using it for debugging?
> >
> > The documentation seems internally inconsistent.
> Huh, I was surpised too, when I saw this changed from previous
> version. In previous version K was just breakpoint identifier.
> Like you said gdb assumed K=0, since it has internal breakpoint
> numbering. Damjan?
>
> Marko
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