[cvs-checkins] pci/rtl/verilog pci_target32_sm.v

[OpenCores CVS Agent <cvs@www.lampret.com>]

CVSROOT:	/home/oc/cvs
Module name:	pci
Changes by:	mihad	02/09/24 18:09:20

Modified files:
	rtl/verilog    : pci_target32_sm.v 

Log message:
	Number of state bits define was removed

--
To unsubscribe from cvs-checkins mailing list please visit http://www.opencores.org/mailinglists.shtml