CVSROOT: /home/oc/cvs Module name: or1k Changes by: lampret 02/08/15 05:04:13 Modified files: orp/orp_soc/rtl/verilog/or1200: or1200_defines.v Log message: Fixed Xilinx trace buffer address. REported by Taylor Su. -- To unsubscribe from cvs-checkins mailing list please visit http://www.opencores.org/mailinglists.shtml