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[cvs-checkins] ethernet/rtl/verilog eth_shiftreg.v



CVSROOT:	/home/oc/cvs
Module name:	ethernet
Changes by:	mohor	02/08/14 17:17:00

Modified files:
	rtl/verilog    : eth_shiftreg.v 

Log message:
	LinkFail signal was not latching appropriate bit.
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