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[cvs-checkins] or1k/ /SOC_Block_diagram.pdf /SOC_Design.pdf / ...



CVSROOT:	/home/oc/cvs
Module name:	or1k
Changes by:	simons	02/06/09 12:38:47

Modified files:
	.              : SOC_Block_diagram.pdf 
Added files:
	.              : SOC_Design.pdf 
	.              : program.txt 
	.              : Top_level_tb.tf 
	.              : ACC.V ALU.V CONTROL.V IR.V MEM.V MUX12.V 
	                 MUX16.V PC.V bus_arbiter.v cmd_ack.v 
	                 cmd_decoder.v cmd_detector.v cmd_generator.v 
	                 cmd_internal_reg.v command_if.v 
	                 data_cache_way0.v data_cache_way1.v 
	                 data_cache_way2.v data_cache_way3.v 
	                 data_in_reg.v data_port.v dma_cntrl.v 
	                 dma_fifo.v dma_internal_reg.v flash_ctrl.v 
	                 fsm.v instruction_cache_way0.v 
	                 instruction_cache_way1.v 
	                 instruction_cache_way2.v 
	                 instruction_cache_way3.v k9f1g08u0m.v 
	                 lru_data_cache.v lru_instruction_cache.v 
	                 oe_generator.v parameter.v ras_cas_delay.v 
	                 ref_ack.v ref_timer.v risc.v sdram.v 
	                 sdram_cntrl.v sdram_mux.v sdram_port.v 
	                 sdramctrl_rtl.v soc.v timer.v uart.v 
Removed files:
	.              : sdram_controller.pdf 
	.              : SOC_Block_diagram.pdf cvs.pdf 

Log message:
	no message


Log message:
	Directory /home/oc/cvs/embedded_risc/Machine_Language added to the repository


Log message:
	Directory /home/oc/cvs/embedded_risc/Test_Bench_Verilog added to the repository


Log message:
	Directory /home/oc/cvs/embedded_risc/Verilog added to the repository

Modified files:
	.              : ram.vhd 
	.              : uart.vhd 
	.              : tbench.vhd 
	.              : makefile 
	.              : reg_bank.vhd 
Added files:
	.              : plasma.vhd 

Log message:
	Altera

Modified files:
	.              : mem_ctrl.vhd 

Log message:
	Fix pause while writting

Modified files:
	.              : mlite_pack.vhd 

Log message:
	Update prototypes

Modified files:
	.              : tbench.vhd 

Log message:
	GENERIC

Modified files:
	.              : mlite.c 

Log message:
	Fixed 64-bit mult

Modified files:
	.              : or1200_rf.v 

Log message:
	Added generic flip-flop based memory macro instantiation.

Modified files:
	.              : or1200_defines.v 

Log message:
	Added defines for enabling generic FF based memory macro for register file.

Added files:
	.              : or1200_rfram_generic.v 

Log message:
	Generic flip-flop based memory macro for register file.

Modified files:
	orpmon/cmds    : Makefile 
	orpmon/drivers : Makefile 
	orpmon/include : board.h 
	orpmon         : Makefile config.mk 
	orpmon/common  : common.c 
Added files:
	orpmon/cmds    : touch.c 
	orpmon/drivers : spi.c 
	orpmon/include : spi.h 

Log message:
	Touch screen test added.

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