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[cvs-checkins] ethernet/rtl/verilog eth_defines.v eth_top.v e ...

To: cvs-checkins@opencores.org
Subject: [cvs-checkins] ethernet/rtl/verilog eth_defines.v eth_top.v e ...
From: OpenCores CVS Agent <cvs-checkins-agent@opencores.org>
Date: Fri, 3 May 2002 12:16:27 +0200
Sender: owner-cvs-checkins@opencores.org

CVSROOT:	/home/oc/cvs
Module name:	ethernet
Changes by:	mohor	02/05/03 12:16:27

Modified files:
	rtl/verilog    : eth_defines.v eth_top.v eth_wishbone.v 

Log message:
	Outputs registered. Reset changed for eth_wishbone module.

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