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[cvs-checkins] ethernet/rtl/verilog eth_defines.v eth_wishbone.v



CVSROOT:	/home/oc/cvs
Module name:	ethernet
Changes by:	mohor	02/04/24 10:52:33

Modified files:
	rtl/verilog    : eth_defines.v eth_wishbone.v 

Log message:
	Compiler directives added. Tx and Rx fifo size incremented. A "late collision"
	bug fixed.

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