[cvs-checkins] or1k/mp3/bench/verilog bench_define.v or1200_m ...

[OpenCores CVS Agent <cvs-checkins-agent@opencores.org>]

CVSROOT:	/home/oc/cvs
Module name:	or1k
Changes by:	lampret	02/01/03 09:40:40

Modified files:
	mp3/bench/verilog: bench_define.v or1200_monitor.v xess_top.v 

Log message:
	Added second clock as RISC main clock. Updated or120_monitor.

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