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[cvs-checkins] Import
CVSROOT: /home/oc/cvs
Module name: pci
Changes by: oc 01/10/02 17:34:06
Log message:
New project directory structure
Status:
Vendor Tag: mihad
Release Tags: initial
N pci/doc/pci_specification.pdf
N pci/apps/crt/rtl/verilog/ssvga_wbs_if.v
N pci/apps/crt/rtl/verilog/ssvga_defines.v
N pci/apps/crt/rtl/verilog/ssvga_fifo.v
N pci/apps/crt/rtl/verilog/ssvga_top.v
N pci/apps/crt/rtl/verilog/ssvga_wbm_if.v
N pci/apps/crt/rtl/verilog/ssvga_crtc.v
N pci/apps/crt/rtl/verilog/timescale.v
N pci/apps/crt/rtl/verilog/top.v
N pci/apps/crt/syn/ucf/pci_crt.ucf
N pci/apps/crt/syn/exc/pci_crt.exc
N pci/apps/crt/syn/out/bit/pci_crt.bit
N pci/apps/crt/syn/out/verilog/crt_time_sim.v
N pci/apps/crt/syn/out/verilog/crt_time_sim.v.bak
N pci/apps/crt/syn/out/sdf/crt_time_sim.sdf
N pci/rtl/verilog/wb_slave_unit.v
N pci/rtl/verilog/cbe_en_crit.v
N pci/rtl/verilog/conf_cyc_addr_dec.v
N pci/rtl/verilog/conf_space.v
N pci/rtl/verilog/constants.v
N pci/rtl/verilog/cur_out_reg.v
N pci/rtl/verilog/decoder.v
N pci/rtl/verilog/delayed_sync.v
N pci/rtl/verilog/delayed_write_reg.v
N pci/rtl/verilog/dp_async_ram.v
N pci/rtl/verilog/dp_sram.v
N pci/rtl/verilog/fifo_control.v
N pci/rtl/verilog/frame_crit.v
N pci/rtl/verilog/frame_en_crit.v
N pci/rtl/verilog/frame_load_crit.v
N pci/rtl/verilog/io_mux_en_mult.v
N pci/rtl/verilog/io_mux_load_mux.v
N pci/rtl/verilog/irdy_out_crit.v
N pci/rtl/verilog/mas_ad_en_crit.v
N pci/rtl/verilog/mas_ch_state_crit.v
N pci/rtl/verilog/mas_load_next_crit.v
N pci/rtl/verilog/out_reg.v
N pci/rtl/verilog/par_cbe_crit.v
N pci/rtl/verilog/par_crit.v
N pci/rtl/verilog/pci_bridge32.v
N pci/rtl/verilog/pci_decoder.v
N pci/rtl/verilog/pci_in_reg.v
N pci/rtl/verilog/pci_io_mux.v
N pci/rtl/verilog/pci_master32_sm.v
N pci/rtl/verilog/pci_master32_sm_if.v
N pci/rtl/verilog/pci_parity_check.v
N pci/rtl/verilog/pci_target_unit.v
N pci/rtl/verilog/pci_target32_ad_en_crit.v
N pci/rtl/verilog/pci_target32_clk_en.v
N pci/rtl/verilog/pci_target32_ctrl_en_crit.v
N pci/rtl/verilog/pci_target32_devs_crit.v
N pci/rtl/verilog/pci_target32_interface.v
N pci/rtl/verilog/pci_target32_load_crit.v
N pci/rtl/verilog/top.v
N pci/rtl/verilog/pci_target32_sm.v
N pci/rtl/verilog/pci_target32_stop_crit.v
N pci/rtl/verilog/pci_target32_trdy_crit.v
N pci/rtl/verilog/pciw_fifo_control.v
N pci/rtl/verilog/pciw_pcir_fifos.v
N pci/rtl/verilog/perr_crit.v
N pci/rtl/verilog/perr_en_crit.v
N pci/rtl/verilog/serr_crit.v
N pci/rtl/verilog/serr_en_crit.v
N pci/rtl/verilog/synchronizer_flop.v
N pci/rtl/verilog/wb_addr_mux.v
N pci/rtl/verilog/wb_master.v
N pci/rtl/verilog/wb_slave.v
N pci/rtl/verilog/bus_commands.v
N pci/rtl/verilog/wbr_fifo_control.v
N pci/rtl/verilog/wbw_fifo_control.v
N pci/rtl/verilog/wbw_wbr_fifos.v
N pci/sw/driver/spartan_kint.h
N pci/sw/driver/Makefile
N pci/sw/driver/README.txt
N pci/sw/driver/sdram_test
N pci/sw/driver/sdram_test.c
N pci/sw/driver/slide.c
N pci/sw/driver/spartan_drv.c
N pci/sw/driver/spartan_drv-2.2.o
N pci/sw/driver/spartan_drv-2.4.o
N pci/sw/driver/fb/XF86Config-fb
N pci/sw/driver/fb/Makefile
N pci/sw/driver/fb/spartan_fb.c
N pci/sw/driver/fb/spartan_kint.h
N pci/sw/driver/fb/startx
N pci/old_stuff/constants.v
N pci/old_stuff/bus_commands.v
N pci/old_stuff/Decoder/tb_decoder.v
N pci/old_stuff/Decoder/decoder.v
N pci/old_stuff/Decoder/defines.v
N pci/old_stuff/Decoder/readme.txt
N pci/old_stuff/Decoder/tb_defines.v
N pci/old_stuff/delayed_sync/delayed_sync.v
N pci/old_stuff/delayed_sync/READ_ME.txt
N pci/old_stuff/docs/pci_specification.pdf
N pci/old_stuff/driver/sdram_test.c
N pci/old_stuff/driver/Makefile
N pci/old_stuff/driver/README.txt
N pci/old_stuff/driver/sdram_test
N pci/old_stuff/driver/slide.c
N pci/old_stuff/driver/spartan_drv-2.2.o
N pci/old_stuff/driver/spartan_drv-2.4.o
N pci/old_stuff/driver/spartan_drv.c
N pci/old_stuff/driver/spartan_kint.h
N pci/old_stuff/driver/fb/XF86Config-fb
N pci/old_stuff/driver/fb/Makefile
N pci/old_stuff/driver/fb/spartan_fb.c
N pci/old_stuff/driver/fb/spartan_kint.h
N pci/old_stuff/driver/fb/startx
N pci/old_stuff/FIFOs/pciw_pcir_fifos.v
N pci/old_stuff/FIFOs/dp_async_ram.v
N pci/old_stuff/FIFOs/dp_sram.v
N pci/old_stuff/FIFOs/fifo_control.v
N pci/old_stuff/FIFOs/pci_tb.v
N pci/old_stuff/FIFOs/wbw_wbr_fifos.v
N pci/old_stuff/FIFOs/read_me.pdf
N pci/old_stuff/FIFOs/wb_tb.v
N pci/old_stuff/pci_master32/pci_master32_sm.v
N pci/old_stuff/pci_master32/pci_stat.v
N pci/old_stuff/pci_target/pci_stat.v
N pci/old_stuff/pci_target/pci_target32_sm.v
N pci/old_stuff/wb_master/wb_master.v
N pci/old_stuff/wb_slave/READ_ME.txt
N pci/old_stuff/wb_slave/wb_slave.v
N pci/old_stuff/wb_slave/delayed_write_reg.v
N pci/old_stuff/wb_slave/test_bench/bus_commands.v
N pci/old_stuff/wb_slave/test_bench/READ_ME.txt
N pci/old_stuff/wb_slave/test_bench/delayed_write_reg.v
N pci/old_stuff/wb_slave/test_bench/conf_space.v
N pci/old_stuff/wb_slave/test_bench/constants.v
N pci/old_stuff/wb_slave/test_bench/decoder.v
N pci/old_stuff/wb_slave/test_bench/delayed_sync.v
N pci/old_stuff/wb_slave/test_bench/dp_async_ram.v
N pci/old_stuff/wb_slave/test_bench/dp_sram.v
N pci/old_stuff/wb_slave/test_bench/fifo_control.v
N pci/old_stuff/wb_slave/test_bench/test_bench.v
N pci/old_stuff/wb_slave/test_bench/wb_bus_mon.v
N pci/old_stuff/wb_slave/test_bench/wb_master32.v
N pci/old_stuff/wb_slave/test_bench/wb_slave.v
N pci/old_stuff/wb_slave/test_bench/wbw_wbr_fifos.v
N pci/old_stuff/conf_space/conf_space.v
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