[cvs-checkins] wb_prefetch_spram/bench/verilog tb_defines.v t ...

[OpenCores CVS Agent <cvs-checkins-agent@opencores.org>]

CVSROOT:	/home/oc/cvs
Module name:	wb_prefetch_spram
Changes by:	lampret	01/07/31 04:00:34

Modified files:
	bench/verilog  : tb_defines.v tb_top.v wb_master.v 

Log message:
	Added RAM_DATAWIDTH. Changed wb_master.

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