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Re: [oc] Modular FPGA board (PCI)



I am looking for free PCI IP core model for a simple application . I want 
to develop an interface for a 16-bit micromputer system(veri old + slow) 
for Data/Address(16-bit) and some control logic. It may  be 
implementable   using CPLD/FPGA Altera/Cypress/Any other.
I have Altera'S QUARTUS web Edition ver 2.

Please suggest me.


pratap.


----- Original Message ----- 
From: "MikeJ" <mikej@f... > 
To: <cores@o... > 
Date: Tue, 13 Nov 2001 20:40:35 -0000 
Subject: Re: [oc] Modular FPGA board (PCI) 

> 
> 
> From: "Richard Herveille" <richard@a... > 
> To: <cores@o... > 
> Sent: Tuesday, November 13, 2001 4:35 AM 
> Subject: Re: [oc] Modular FPGA board (PCI) 
> 
> 
> A few comments on the comments ! 
> 
> >A few comments on this: 
> 
> >Paul, 
> > 
> >Just to repeat my concern, 'standard' 33Mhz 32 bit slots in 
> PC's use 5V 
> >signalling. 
> > 
> >The pci connector has a keyed section, which must mate up with 
> a 
> >corresponding slot in the plug in card. This key slot can be in 
> one of two 
> >positions (actually the connector is just rotated 180) which 
> indicate 
> >whether the motherboard uses 5v or 3v3 signalling.  Many plug 
> in pc cards 
> >are 'universal' which means they have two slots and can fit in 
> any hole - 
> >this is possible by powering the ASIC's IO ring with the VIO 
> supply on the 
> >PCI connector. 
> >This is not possible using virtex FPGA's as VCC_IO cannot be 
> 5V. 
> 
> Doesn't matter. As long as the IO's can handle the over-voltage. 
> Some FPGAs 
> use 3v3 IOrings, but have dedicated IOpads which can handle 5v 
> signals. 
> This is normally taken care of by terminating diodes in the IOpads. 
> 
> MIKEJ : agreed - I was attempting to point out that universal cards 
> should 
> power 
> the output drivers from VCC_IO  which can only be 3v3 in a bus 
> which 
> contains 
> 3v3 slots or the 3v3 power rail itself. (pci spec 2.2 page 114). 
> Therefore a card in a 3v3 slot does not need to be 5v tolerant - in 
> theory 
> at least. 
> Anyone know any different? 
> As you say the important point for universal cards is that the 
> inputs are 
> tolerant upto 
> 5v as in the case of virtex 1 and sparten2. 
> 
> >If you can guarantee the dev board will only go in 3v3 slots 
> (and these are 
> >still quite rare) then everything will be fine. 
> 
> Not true. PCI has set a course where eventually 5v devices won't be 
> supported anymore, but there's still a long time to go. This means 
> even 
> though your board is a pure 3v3 design, PCI signals can still reach 
> 5v. 
> This is caused by other boards in the system (or even the system) 
> which use 
> 5v output drivers. 
> 
> MIKEJ : disagree, see above 
> 
> >I'm not sure you can get away with external buffers around the 
> FPGA for 
> PCI. 
> >as was suggested : 
> >1, as the signals are bi-directional you would have terrible 
> timing 
> problems 
> >and two loads per net - which is illegal 
> 
> 
> the rest has been trimmed as we got told off ! 
> 
> Cheers, 
> MikeJ 
> 
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