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Re: [oc] synthesis error
You have probably managed to connect the output of an 'and' gate to
ground. (or similar)
I once spent quite a while debugging a gate level simulation where a
gate drove ground to 'X'. Had me really confused. That propagates all
over the place in weird ways. Some simulators get confused with net
strength.
john
On Thu, 2003-07-10 at 23:34, spyros wrote:
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> hi all,
> i'm trying to synthesize a project with leonardo,
> but i get the following error:
>
> ERROR: a power net is driven by primitive gate(s) -- NET: ready
>
> can someone explain to me what is this supposed to mean?
> I googled and searched leonardo's manuals but till now nothing.
>
> TIA,
> spyros
>
> - --
>
> öïéôçôÞò óôï Ä.Ð.È
>
> student @ DUTH
>
> public key: dalab.ee.duth.gr/~spyros/my_pub.asc
>
>
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> =tcWp
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>
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John Sheahan <jrsheahan@optushome.com.au>
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