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hello,
I got some problem in using TMAX,we add the clock gating
cell to the design by DC and PowerCompiler,the logic comparsion is also ok, but
failed in running the TMAX generated patterns, and if we removed the clock
gating cell,the pattern can pass.Does it some special in using TMAX for design
with clock gating cells design?
Could some body help me with that problem? Thanks.
your's GB
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