Re: [oc] Query abt Switch level modelling in Verilog

[John Sheahan <jrsheahan@optushome.com.au>]

On Sat, 2003-06-14 at 15:52, R. Ramakrishna wrote:
> Hi All,
>  
> Can any one kindly answer my query? I want to know if the MOS switches and other lowest-level primitives that verilog supports are used by any one, either in their simulation environment or in their RTL code. If YES, then where exactly are they being used? 
>  
> Thanks in Advance!

they are useful/required creating gate level library models themselves,
used in a gate level sim.
john
  

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